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Technical specification |
| Typical dimentions |
Electric parameters
|
Guarantee parameters
|
| Chips for silicon switching diodes
|
| Type: 1N4148 (chip size 0.28 õ 0.28 mm) |
|
Typical dimentions |
|
| Diameter of wafer |
76 mm, 100 mm |
|
Sizes of chip
À
B
C
D |
0.28 õ 0.28 mm
160 ±10 µm
25 ± 5 µm
140 ± 20 µm
|
| Metallization of planar side |
V - Ag |
| Contact electrod |
Ag |
| Protective layer |
SiO2
+ Ta2O5 |
| Metallization of nonplanar side |
V - Ag |
| Width of scribing track F |
50 µm |
| Method of chip splitting |
Laser cutting with mechanical breaking |
|
|
Electric parameters* |
Tamb=25°C
| Measuring parameter |
Unit |
Min. |
Max. |
Test condition |
| Reverse current, IR |
nÀ
µÀ |
|
23
1,5
|
UR = 20 V
UR = 75 V |
| Reverse Breakdown woltage, UBR |
V |
105 |
|
IR=100
µÀ |
| Forward voltage, UF |
V |
|
1,05 |
IF=30
mA |
*Note. Electric parameters are measured on the wafer. Measuring on splitted chips is not made. |
|
Guarantee parameters* |
Tamb=25°C
| Measuring parameter |
Unit |
Min. |
Max. |
Test conditions |
| Reverse current,
IR1,
IR2 |
nÀ
µÀ
|
|
25
5 |
UR=20 V
UR=75 V |
| Forward voltage UF |
V |
|
1,0 |
IF
= 10 mÀ |
| Rewerse Breakdown voltage, UBR |
V |
100 |
|
IR=100
µÀ |
| Total capacitance of diodetot |
pF |
|
4 |
UR
=0 V, f = 1 MHz |
| Reverse recovery time, tRR |
ns |
|
4 |
IF=10
mÀ to IR=50 mÀ,
RL = 100 W measured to
IR = 1 mÀ |
| Power of dissipation |
mW |
|
500 |
|
| Operation junktion temperature |
°C |
|
200 |
|
| Storage temperature |
°C |
-65 |
200 |
|
*Note. Guarantee parameters are to the chips that are sealed hermetically in DO-35. Yiela guarantee in according with electro parameters is not less 90%. |
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Requirementrs to chips' outward. |
- Formation of roughness on the cutting line because of origin of silicon mechanical damages is allowed. Silicon mechanical damages spread in the limis of width of scribing tracks.
- Not allowed:
2.1. Absence of electrode;
2.2. Mechanical damages that penetrade into safeguard zone;
2.3. Bond liftoff of metallization on non planar side more than 1/4 area of chip;
2.4. Separate depression on silver electrodes with diameter more than 1/3 of electrode diameter and depth more than 1/3 of electrode height;
2.5. False putting of silver on chip area.
Note. Control of chip outward is made by visual inspection (p.1) and microscope when increase is 16x (p.2). Yield guarantee in accordance with chip outward is not less 99 %.
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Our
address |
UE "Tsvetotron plant"
11 Kariernaya Street
Brest, 224022, Republic of Belarus
phone: +375 (0)162 43-48-03, fax: +375 (0)162 43-32-58
E-mail: tsvetotron
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